Unveiled May 16th at AMD’s annual Financial Analyst Day, the Epyc server system-on-chip was designed specifically to meet the current and future workload demands of the modern, software-defined data center, the company said.
Set to be released in June, the processor formerly codenamed “Naples” was shown in a demonstration at the Sunnyvale, Calif. event to outperform a two-socket/two-processor platform in both memory bandwidth and input/output capacity.
The Epyc processor also represents the next phase of AMD’s long-term plans for growth by targeting the PC, data center and immersive devices market, president and CEO Lisa Su said during the event. In a statement released after her presentation, she said the company’s goal is to “take advantage of the major shifts in the technology industry and deliver significant financial returns.”
Designed for Changing Workloads
“We know that in the environment that is the data center today, workloads are changing: public cloud, private cloud, on-prem[ises], hybrid solutions… the amount of change is massive,” Scott Aylor, corporate VP and general manager for enterprise solutions, said in an AMD video about the new Epyc SoC.
Designed with 32 cores and support for two threads per core, AMD’s Epyc processor also provides eight channels of memory per device and 128 lanes of high-speed, PCI express 3-standard input/output. It also features a highly-optimized cache structure and can deliver up to 4 terabytes of memory in a dual-socket server.
AMD believes the new product line-up has the potential to reshape significant portions of the data center market with its unique combination of performance, design flexibility, and disruptive TCO. That’s according to Forrest Norrod, AMD’s senior vice president and general manager of enterprise, embedded & semi-custom products.
In his presentation at the Financial Analyst Day, Norrod compared a single-socket Epyc processor to a comparable two-socket chip from Intel. Norrod said the…